Marvell Introduces Breakthrough Structera CXL Product Line to Address Server Memory Bandwidth and Capacity Challenges in Cloud Data Centers – Information Important Internet

• New creation distinction is the industry’s prototypal to combine Arm® Neoverse® processors, inline compression, and quaternary noesis channels.
• Structera^™ A CXL near-memory gun kinsfolk is optimized to come high-bandwidth noesis applications much as unfathomable acquisition and ML/AI on general-purpose servers.
• Structera^™ X CXL memory-expansion someone kinsfolk is the prototypal to hold up to 12 DDR4 noesis modules, sanctioning noesis recycling to turn e-waste and tap computer noesis noesis for applications much as in-memory databases.

SANTA CLARA, Calif., July 30, 2024 /PRNewswire/ — Marvell Technology, Inc. (NASDAQ: MRVL), a cheater in accumulation stock conductor solutions, today launched the Marvell^® Structera^™ creation distinction of Compute Express Link^® (CXL^®) devices that enable darken accumulation edifice operators to overcome noesis action and ordering challenges in general-purpose servers.

To come memory-intensive applications, accumulation edifice operators add player servers to intend higher noesis bandwidth and higher noesis capacity. The compute capabilities from the additional processors are typically not used for these applications, making the servers wasteful from outlay and noesis perspectives. The CXL playing accepted addresses this contest by sanctioning newborn architectures that crapper expeditiously add noesis to general-purpose servers.

The Structera creation distinction comprises digit CXL figure families that are optimized for assorted ingest cases. The Structera A CXL near-memory accelerators are a newborn collection of devices that combine server-class processor cores and binary noesis channels with CXL to come high-bandwidth noesis applications much as unfathomable acquisition congratulations models (DLRM) and organisation learning. The Structera X CXL memory-expansion controllers enable terabytes of noesis to be additional to general-purpose servers and come high-capacity noesis applications much as in-memory databases. The Structera CXL figure families are the industry’s prototypal to hold quaternary noesis channels, combine inline densification and ingest 5nm manufacturing processes.

In constituent to the Structera A and X accepted products, poet develops bespoken CXL conductor for darken operators that is optimized for their unequalled architectures and workloads.

A New CXL Use Case: ML/AI Acceleration

The Structera A accelerators combine 16 Arm^® Neoverse^® V2 cores and are optimized to meliorate the action of broad memory-bandwidth applications much as DLRM. DLRM is defined by both distributed and dumb noesis operations. Sparse dealings haw impact a noesis wall, in which noesis bandwidth is depleted for the acquirable compute. The Structera A 2504 accelerator, the prototypal creation in the family, supports up to 200 GB/sec noesis bandwidth and 4TB of noesis capacity¹.

For a DLRM computer using a azygos 64-core processor, adding a azygos Structera A figure would impact the sort of compute cores by 25% (64 vs 80), aggregative noesis bandwidth by 50% (400 GB/sec vs 600 GB/sec), amount noesis by up to 4TB, and noesis bandwidth per set by 25% (6.25 GB/sec vs. 7.5 GB/sec). It would also meliorate noesis bandwidth noesis efficiency from 1W to 0.83W per GB/sec. Adding digit Structera A devices would impact compute cores by 50%, threefold aggregative noesis bandwidth, impact noesis noesis by up to 8TB, impact noesis bandwidth per set by 50%, and meliorate noesis bandwidth noesis efficiency to 0.75W² per GB/sec.

The Structera X creation family, by contrast, is fashioned for expanding noesis noesis per computer to come high-capacity noesis applications. The Structera X devices are the industry’s prototypal to hold quaternary channels of DDR4 and DDR5 noesis and hold up to threesome DDR4 threefold in-line noesis modules (DIMMs) per steer (3DPC) for crescendo noesis noesis per someone and computer node. The devices are also the prototypal CXL memory-expansion products that crapper simultaneously hold digit computer CPUs to behave power, expanse and noesis utilization.

The Structera X 2404 enables operators to reuse their DDR4 DIMMs from decommissioned general-purpose servers. Millions of useful DDR4 DIMMs are due to embellish e-waste over the incoming some eld as operators change existing general-purpose servers with newborn ones utilizing DDR5³. Using “free” DDR4 DIMMs to modify the noesis in these servers reduces capex by thousands of dollars per general-purpose server⁴. Repurposing decommissioned DDR4 DIMMs also addresses accumulation edifice sustainability goals.

Structera products are the prototypal in the playing to incorporate hardware-based inline noesis densification that adheres to the Google and Meta specifications that hit been submitted to the Open Compute Project (OCP).

“Memory admittance is a varied difficulty and darken assist providers dissent substantially when it comes to their goals and deployment strategies for CXL,” said Bob Wheeler, top shrink at Wheeler’s Network. “Marvell has matured a long-term exteroception for CXL that capitalizes on this heterogeneity of uses and power encourage hyperscalers and others to take CXL to bit the so-called noesis wall.”

“Our newborn Structera CXL creation distinction power be a game-changer in sanctioning best inventiveness utilization and cloudy forcefulness activity for ordering memory-intensive workloads in the cloud,” said Raghib Hussain, chair of products and technologies at Marvell. “Marvell is delivering on the prospect of CXL and our dedication to customers to hold them cipher their most hard issues. CXL power advise to be a grave profession enabler for expedited stock crossways our compute, connectivity and element portfolios.” 

Broad Ecosystem Support

Several companies are nonindustrial plans to hold the newborn Structera CXL creation line.

“As CXL matures, it unlocks opportunities for conception finished disaggregation, sanctioning transformative applications crossways the whole accumulation edifice ecosystem,” said Raghu Nambiar, joint evilness president, Data Center Ecosystems and Solutions, AMD. “Our cooperation with poet is at the hunch of ensuring our dedication to this ecosystem; delivering the action and forcefulness efficiency necessary to deploy and bit incoming procreation stock to noesis the most rigorous playing grave and AI applications.”

“The new Marvell Structera CXL someone kinsfolk combines Marvell’s densification profession and SoC skillfulness with the action and efficiency benefits of Neoverse V2 in a artefact that exemplifies the measure of conception exclusive prefabricated doable by Arm Neoverse,” said Mohamed Awad, grownup evilness chair and generalized manager, Infrastructure Line of Business, Arm. “It’s just this identify of optimized processing that reduces forcefulness activity and enables the high-performance stock that AI demands.”

Debendra Das Sharma, Chief I/O Architect at Intel said, “Intel is delighted that poet is tributary to the evolving CXL ecosystem, including the utilization of noesis expanders for noesis and bandwidth treatment solutions. These solutions enable the reuse of DDR4 DIMMs for noesis noesis treatment patch also crescendo the noesis bandwidth acquirable to the mainframe cores.  With hold for CXL 2.0, Intel Xeon 6.0 creation kinsfolk is at the perspective of these developments and appreciates the cooperation with poet to alter these solutions to market.”

“Marvell is an essential CXL ecosystem relation to Micron, and our impact unitedly power hold front the acceptation of noesis treatment in the industry. Our cooperation on noesis interoperability power enable pliant and ascendible noesis resources to correct crescendo processor set counts and data-intensive workloads,” said Vijay Nain, grownup administrator of CXL Product Management at Micron. “By dynamical higher noesis noesis and modify latency, accumulation edifice operators crapper goodness from low top and operative expenses.” 

Product Features

Marvell Structera A 2504

• PCIe 5.0/CXL2.0 x16
• Four channels of DRAM DDR5 6400 MT/sec  
• Two noesis DIMMs per steer (2DPC) support
• 16 Arm Neoverse V2 cores at 3.2 GHz 
• Inline LZ4 densification and decompression 
• Inline AES-XTS 256-bit coding and decryption 
• Embedded element country noesis and bonded boot 

Marvell Structera X 2404

• PCIe 5.0/CXL2.0 1 x16 or 2 x8
• Four channels of DRAM DDR4 3200 MT/sec 
• Three noesis DIMMs per steer (3DPC) support
• Inline LZ4 densification and decompression
• Inline AES-XTS 256-bit coding and decryption
• Embedded element country noesis and bonded boot

 Marvell Structera X 2504

• PCIe 5.0/CXL2.0 1 x16 or 2 x8
• Four channels of DRAM DDR5 6400 MT/sec 
• Two noesis DIMMs per steer (2DPC) support
• Inline LZ4 densification and decompression
• Inline AES-XTS 256-bit coding and decryption
• Embedded element country noesis and bonded boot

Availability

Structera A near-memory accelerators, Structera X memory-expansion controllers and bespoken CXL conductor power distribution in the ordinal lodge of 2024.  

About Marvell
To have the accumulation stock profession that connects the world, we’re antiquity solutions on the most coercive foundation: our partnerships with our customers. Trusted by the world’s directive profession companies for over 25 years, we move, store, impact and bonded the world’s accumulation with conductor solutions fashioned for our customers’ underway needs and forthcoming ambitions. Through a impact of unfathomable cooperation and transparency, we’re finally dynamical the artefact tomorrow’s enterprise, cloud, automotive, and traveler architectures transform—for the better.

1. Based on 512GB DIMMs.
2. 64-core processor acknowledged to control at 400W and 400GB/sec.
3. poet and playing shrink estimates.
4. The theoretic assumes 4TB of noesis additional finished 32 128GB DIMMs. Pricing per 128GB DDR5 DIMMs is estimated at $280, the inexact mart toll in June 2024.

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For boost information, contact:
Kim Markle
pr@marvell.com

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